Cister Research Centre in Realtime and Embedded Computing Systems

🚨 🚨 RTNS 2024 is just around the corner, but registration is still open.

Don't miss the chance to take part in this exciting event and discover the latest developments on the subject of Real-Time Networks and Systems.

📑 Check out the full programme for the 32nd International Conference on Real-Time Networks and Systems (RTNS 2024) here: www.cister-labs.pt/rtns24/prog

There will be an exciting keynote by Silviu S. Craciunas (TTTech, www.cister-labs.pt/rtns24/prog_keynote) and an excellent line-up of technical presentations over 3 days and 8 sessions.

Also, be sure to attend the Junior Researchers Workshop on Real-Time Computing (JRWRTC, www.cister-labs.pt/rtns24/jrwrtc).

We look forward to seeing you in Porto from 6 to 8 November 2024. Register here: www.cister-labs.pt/rtns24/reg

Distinguished Seminar - "Learn to Achieve Fast and Accurate Thermal Simulations of Multicore Microprocessors Guided by Physical Principles with Application to Thermal-aware Scheduling".
Presented by Dr. Ming-Cheng Cheng.

🎓 On June 25th, Yilian Ribot González successfully defended her Ph.D. thesis, supervised by Dr. Eduardo Tovar, and co-supervised by Dr. Geoffrey Nelissen and Dr. Luis Almeida, at the Faculty of Engineering of the University of Porto, Portugal.

Developed with CISTER support, her thesis entitled "Predictable Network on Chip for Real-Time Systems" proposes a set of novel NoC architectures that address performance concerns while providing deterministic timing behaviors and flexibility for various platforms and application requirements.

With this excellent milestone, we continue to fulfil our mission of helping our doctoral students to carry out their studies with excellence. ✔👏

Read the full article: www.cister-labs.pt/news/972

🎓 Next Friday, April 26th, the CISTER member Javier Pérez Rodríguez will present his PhD thesis entitled "Thermal-aware Schedulability Analysis for Modern Real-time Computing Systems", as part of the Doctoral Programme in Electrical and Computer Engineering at the Faculty of Engineering of the University of Porto.

The jury will be composed of the following members:

Dr. José Nuno Moura Marques Fidalgo, Associate Professor, Faculty of Engineering, University of Porto (President);
Dr. Jian-Jia Chen, Professor at the Department of Computer Science at TU Dortmund University, Germany;
Dr. Sandro Emanuel Salgado Pinto, Principal Researcher at the ALGORITMI Centre at the University of Minho;
Dr. Pavel Zaykov, Lead Innovation & Research Engineer at Codasip Labs;
Dr. João Paulo de Castro Canas Ferreira, Associate Professor, Department of Electrical and Computer Engineering, Faculty of Engineering, University of Porto;
Dr. Patrick Meumeu Yomsi, Researcher at CISTER - Centre for Research in Embedded Computing Systems and Real-Time at the Porto Higher Institute of Engineering (Supervisor).

Javier joined the CISTER Research Centre in 2018 and has since been developing his PhD thesis with the support of CISTER. He was also holder of an FCT individual grant.

We wish him the best of luck. 🤞



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